| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2011-12-12 | multithread preprocessing of ipecamera frames and code reorganization | Suren A. Chilingaryan | |
| 2011-12-06 | Fix multiword register reads in a proper way | Suren A. Chilingaryan | |
| 2011-12-05 | Fix addressing for multiword register space reads | Suren A. Chilingaryan | |
| 2011-07-09 | Support dynamic registers, support register offsets and multiregisters ↵ | Suren A. Chilingaryan | |
| (bitmasks), list NWL DMA registers | |||
| 2011-07-06 | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | |
| 2011-06-16 | Move to new FPGA design | root | |
| 2011-06-07 | 32 bit fix | Suren A. Chilingaryan | |
| 2011-03-09 | Support for FPGA registers | Suren A. Chilingaryan | |
